Appendix A: BugHunter System Tasks |
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Appendix A: BugHunter System Tasks |
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Appendix A: BugHunter System Tasks |
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Appendix A: BugHunter System Tasks |
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This Appendix describes PLI based BugHunter System Tasks. If you are using a Verilog simulator, you can call these system tasks in your source code by prefixing the function with a $ symbol, for example: $btim_dumpfile("myfile.btim"); . If you are running from Bug Hunter’s graphical environment, you can execute these system tasks from the console window on the simulation button bar. See your simulator’s documentation for how to execute user-written system task using this method, a few simulators do not support this capability. If you are running your simulator in command line mode, you can link in the BugHunter dll for your specific simulator and get access to theses system tasks (the graphical environment does this automatically when it launches the simulator).
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VeriLogger vlogcmd |
VerilogXL |
ModelSim |
NC |
ActiveHdl (Verilog) |
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes *1 |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
- |
Yes |
Yes |
Yes |
- |
|
- |
Yes |
Yes |
Yes |
- |
|
- |
Yes |
Yes |
Yes |
- |
|
- |
Yes |
Yes |
Yes |
- |
|
Yes |
Yes |
- |
Yes *2 |
- |
|
Yes |
Yes |
Yes |
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
- |
|
- |
Yes |
Yes |
Yes |
- |
*1 - You must specify the full path to the signal name.
*2 - Currently supported for NC Verilog but not NC VHDL.
Command Line Simulator Support