BugHunter Pro and the VeriLogger Simulators

2.2 Build and Simulate

2.2 Build and Simulate

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2.2 Build and Simulate

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BugHunter has two simulation modes, Auto Run and Debug Run, that determine when a simulation is performed. In the Debug Run simulation mode, simulations are started only when the user clicks the Run or Single Step buttons (similar to a standard HDL simulator). In the Auto Run simulation mode, the simulator will automatically run a simulation each time a waveform is added or modified in the Diagram window. The Auto Run mode makes it easy to quickly test small components using a stimulus diagram and do bottom-up testing of your components. Click the mode button to toggle between the two simulation modes.

The active simulation mode is displayed on the left most button on the simulation button bar.

The build and simulate functions are accessed from the simulation button bar located at the top of the main window. These buttons also create batch files that can be used to run the simulator from the command line (see Section 5.3 Batch Files for Command Line Simulators).

Project Simulation Properties - opens a dialog that controls how the project is built, and determines the simulator run time options and which simulator to use for projects and diagrams. It also supports configurations for saving options for different kinds of builds. See Section 2.1 Project Simulation Properties for an in-depth discussion of the settings in this dialog.

Build - compiles the project files, builds the hierarchical tree, populates the Stimulus and Results diagram, and if necessary generates a testbench. It does not run a simulation. The <F7> key and the Simulate > Build menu also perform the same function. See the note below for controlling the destination library during the build.

Run/Resume - compiles the files (if there have been changes since the last build) and then runs a simulation until it is stopped by a breakpoint, the pause button, the stop button, or the end of the simulation is reached. This button also continues a simulation when it is currently paused. The <F5> key and the Simulate > Run menu also perform the same function.

Step Into - steps to the next line of code and will also step into function calls.

Step Over Calls - steps to the next line of code. It does not step into function calls.

Step Out - executes to the end of the current function and stops as the function finishes.

Enable Trace Logging - if the Log button is depressed then using any of the stepping buttons will send a trace statement to the simulation.log file.

Pause - stops the simulation and places the simulator into interactive debugging mode. This button is only active during a simulation.

End - exits the simulation.

Goto - opens an editor at the line that will execute next. Use this button when the simulation is stopped.

Run To Time button bar runs the simulation for a specified amount of time. Type a time into the time box, pick the units of time, and then click the green triangle with the hourglass button.

First build to debug syntax errors:

Normally you will first press the Build button to compile the code and debug any syntax errors. The status of the build is reported in the lower right hand corner of the screen.

Simulation Building means that the compile is still compiling.

Simulation Built means that the compile succeeded and you are ready to simulate

Compile Error means that the compile failed and the syntax errors will be listed in the Error tab of the Report window (see Section 2.7: Report Window Error and Log file tabs). Double click on an error to be taken to the code that caused the error.

Then run the simulation:

Press one of the green Run buttons to start the simulator. The status of the simulator is reported in the lower right hand corner of the screen.

Simulation Started shows that the simulation has been started at time 0, but has not yet executed a line of code.

Simulation Running shows that the simulation is currently running and may be stopped using the pause or stop button.

Whenever a simulation is paused, the simulation time and scoping level are listed in the status bar.

Simulation Good is displayed when the simulator is completed without errors.

Compiling to Destination Libraries during a Build:

By default, the source files under the User Source File folder (in the Project Window) are compiled to the standard 'work' library in VHDL. Sometimes, however, these source files may need to be compiled to a different library. You can override the default work library destination for a source file by specifying the new library using a right click context menu.

In the User Source Files folder, right click on the source file  and choose Set Destination Library for Compiled File from the context menu. This opens a dialog where you can set the name of the logical library that this file will be compiled to when Builds are performed.