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SynaptiCAD distributes EASE, HDL Companion, IO Checker

SynaptiCAD is now the US and Canadian distributor for HDL Works EDA tools: Ease, HDL Companion, and IO Checker. These tools provide alternative graphical approaches for VHDL and Verilog code design which also complement SynaptiCAD's timing diagram editors and graphical simulation tools.

Ease State Diagram Editor

EASE provides state machine bubble editor, truth table designer, and block diagram design environment for generating VHDL and Verilog code.

HDL Companion VHDL and Verilog Exploration

HDL Companion scans design directories and creates a complete hierarchal view of any VHDL or Verilog design and all supporting files. It also includes linting and HTML document generation.

IO Checker verifies pins between FPGA and PCB

IO Checker verifies hundreds of pins between an FPGA and the PCB design using a rules based approach (regular expressions).

ConnTrace verfies connections between various PCBs

ConnTrace is used to verify the connections between various PCB's, Independant on how your PCBs are connected (backplanes, connectors and/or rear panels). ConnTrace will present a view of the connections in seconds.

Click here to download EASE, HDL Companion, or IO Checker

For an evaluation license please contact SynaptiCAD at 800-804-7073 or email: