Get a High-performance compiled-code Verilog 2001 simulator with a FREE 6-month License
VeriLogger Extreme is a high-performance compiled-code Verilog 2001 simulator with automatic test bench
generation that significantly reduces simulation debug time. VeriLogger Extreme offers fast simulation of
both RTL and gate-level simulations with SDF timing information. VeriLogger Extreme supports design
libraries and design flows for all major ASIC and FPGA vendors, including Actel/MicroSemi, Altera, Atmel, LSI Logic,
QuickLogic, and Xilinx.
BugHunter Pro graphical debugger included with purchase of VeriLogger Extreme!
BugHunter Pro is SynaptiCAD's graphical Verilog/VHDL integrated development environment, which supports
debugging with all major HDL simulators. BugHunter supports source-level debugging, a waveform compression
engine for high-speed waveform dumping and viewing, and graphical test bench generation features for
rapidly testing HDL models. BugHunter also supports importing and exporting simulation test vectors
to Agilent and Tektronix pattern generators and logic analyzers.
VeriLogger Extreme makes verilog simulation and hardware testing easy
Going one step further, VeriLogger Extreme enables designers to re-use the test vectors created in the
simulation phase during their hardware test and debug. This means the same tests used to test your simulation
models can test your actual hardware. Plus, you can create simulation test benches from waveforms acquired
with logic analyzers, enabling you to test how your simulation reacts to data from existing hardware.
Optimized for your laptop!
VeriLogger Extreme has been optimized for low memory usage, enabling even very large designs to run
on memory-constrained laptops. VeriLogger Extreme uses 20% less memory than SynaptiCAD's existing interpreted
Verilog simulator, VeriLogger Pro, which itself uses less memory than any other simulator on the market.
Speed-wise, VeriLogger Extreme is 10-40x faster than VeriLogger Pro for RTL-level simulation and 180x faster
for gate-level simulation.
Technical Details
Evaluate and Purchase VeriLogger:
VeriLoggger Screen Shot
Simulation Button Bar
Diagram Window
Report Window
Project window
Editor window
Status Bar
Customer Feedback
Got a question about VeriLogger Extreme or Verilog simulation?
You can always call 800-804-7073 to have any questions answered directly.
Visit here for a quick primer on
Verilog syntax. We also maintain a blog with updates about tips and features of
Verilog simulation with VeriLogger.
Language translations
Japanese translation: Verilog simulator
German translation: Verilog simulator
French translation: Verilog simulator
|
Main Menu
