SYNAPTICADcolon VERILOGGER
 

Simx, SynpatiCAD's Verilog Compiler

SynaptiCAD Verilogger Extreme bundle consists of a HDL GUI debugger (BugHunter Pro) and a command-line based Verilog compiler (simx). The Simx compiler can be run as a standalone Verilog simulator or under control of the GUI debugger.

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Standalone Verilog Compilation Phases (Analysis, Elaboration, Code Generation, C++ Compilation)

When Simx is run directly by the user as a Verilog compiler, it first runs a Verilog analyzer that parses the input Verilog source files and populates the current working library on disk with descriptions of the modules, nets, registers, primitives, etc. After the Verilog analyzer phase completes, the user-selected top-level modules of the design are elaborated using the descriptions of the modules written to the working library and any other compiled library that contains descriptions of modules used by the design. During elaboration, instances of modules instantiated inside the top-level modules are replicated to create a tree-like structure. Next this tree structure is traversed by the code generator to create C++ code that can simulate the design's behavior.

Finally, this C++ code is compiled by a C++ compiler into a simulation DLL (i.e. shared library) called a simulation snapshot. Multiple snapshots can be created by elaborating the same Verilog source code with different top-level modules selected or with different simulation options passed to the Verilog compiler.

Running a Simulation Snapshot

The command-line tool simxloader is used to load a simulation snapshot and run the simulation. For example, to run a simulation snapshot called my_sim, type:

simxloader -r my_sim

By default, if no snapshot is specified, the most recently compiled snapshot in the current working library will be run.

How BugHunter performs Verilog Compilation

When the "Build" button is pressed in the debugger, the GUI first "preparses" the user's Verilog source code to detect any syntax errors and stores information about the modules, nets, etc into the current working library on disk. In other words, it performs the same Verilog analysis steps normally performed by Simx when Simx is run in standalone mode. Therefore, by default, BugHunter doesn't pass the source files to Simx when it launches Simx to perform a Verilog compilation. Instead, it launches Simx in an "elaboration-only" mode where it only tells simx the top-level modules to be elaborated in the working library. From this point on, simx performs the same steps to create a simulation snapshot as described above for standalone verilog compilation.

When the "Run" button is pressed in the debugger, the GUI launches simxloader to run the most recently compiled snapshot (or the snapshot specified by the user in the simulation project file). Simxloader then sends waveform data back to the GUI as the simulation progresses so that the states of signals and variables in the design can be displayed in the GUI's waveform window.