WaveFormer Pro is a revolutionary new rapid-prototyping EDA tool that helps you design faster and with
fewer mistakes. WaveFormer Pro enables you to automatically determine critical paths, verify timing
margins, adjust for reconvergent fanout effects, and perform "what if" analysis to determine
optimum clock speed. WaveFormer Pro also lets you specify and analyze system timing and perform Boolean
level simulation without the need for schematics or simulation models. When your timing diagram is complete,
you can then generate digital stimuli for your favorite Verilog, VHDL, SPICE or gate-level simulator.
WaveFormer Pro also has the ability to import and annotate simulation and logic analyzer data, for publication
quality design documentation.
Check out WaveFormer Pro's Feature pages:
Watch an Animated Tutorial of WaveFormer Pro
Other SynaptiCAD Timing Diagram Editors:
Evaluate and Purchase WaveFormer Pro
Got a question about WaveFormer Pro and HDLs?
Post your question on the newsgroup comp.lang.verilog and it will
be answered by our technical support staff (the newsgroup is checked at least once a day), or , call
800-804-7073 and ask for Gary. He will give you a brief tour of WaveFormer Pro and cover important areas
like: drawing waveforms, creating multi-bit buses, documentation techniques, import and export capabilities,
and basic simulation features.
Japanese: Timing diagram editor
German: Timing diagram editor
French: Timing diagram editor