Product Update Press Release, July 1, 2010
VeriLogger supports encrypted models from Actel, Altera, and Xilinx
SynaptiCAD has released an updated version of
VeriLogger Extreme, a compiled-code Verilog simulation and
debugging environment, that adds support for encrypted IP models
from all the major ASIC/FPGA vendors. VeriLogger supports both
binary-encrypted SmartModels based on the common SWIFT-based
standard and the more recent encrypted source-code format
(sometimes referred to as protected envelopes) added as part of
the Verilog-2005 standard.
For a limited time, SynaptiCAD will be giving away
free "no strings attached" 6 month licenses for VeriLogger
Extreme. Free licenses will be available for both Linux and
Windows versions of the simulator. Unlike the lower cost
simulators typically provided with FPGA tools, SynaptiCAD's
simulator is being distributed without any code that slows down
the simulator when run on larger designs.
"Support for encrypted models has been a real
stumbling block for free and low-cost simulator offerings in the
past. This is the first time in over a decade that there's been a
free Verilog simulator offered that's capable of simulating
encrypted IP models from the major FPGA vendors," according to Dan
Notestein, president of SynaptiCAD. "But we're not stopping here.
We're currently adding some performance enhancements that will
make VeriLogger the fastest software-based Verilog simulation
environment around within the next few months."
For any questions concerning this press
release please contact Donna Mitchell at 540-953-3390 or
email at firstname.lastname@example.org. High-resolution images can be
downloaded directly from SynaptiCAD's web site at