Waveform Generation and Bus Tutorial (Tutorial 2B)

In this tutorial you will learn techniques to quickly generate signals from temporal equations, add equations to existing signals, and create Virtual, Group and Simulated buses. For additional information through this tutorial, please refer to the manual, or the on-line help.

This tutorial assumes that you are able to draw signals and are familiar with the features explained in the previous tutorials. We recommend that beginners start with the Basic Drawing and Timing Analysis Tutorial, tutbas1.htm, to learn the basics of timing diagram editing, before attempting this tutorial.

tutadv21

Figure 1:1 Timing diagram used for this tutorial. Demonstrates buses, virtual buses, and signal generation using temporal equations.

1) Generate Waveforms From Temporal Equations

Generating waveforms from temporal equations provides a quick way to generate signals that have a known pattern that is more complicated than a periodic clock.

Temporal equations are entered in the Signal Properties dialog using the edit box to the right of the Wfm Eqn button The edit box contains the default equation: 8ns=Z (5=1 5=0)*5 9=H 9=L 5=V 5=X

The default equation draws a waveform that uses all of the available waveform states. If you start by editing the default equation you do not have to memorize the syntax of these equations.

The syntax consists of time-value pairs separated by spaces. The values are 0, 1, Z, V, H, L, and X which represent the graphical states of the waveforms. For example, the 8ns=Z part of the default equation draws an 8 ns tristate segment.

To repeat a sequence of states, enclose a list of time-value pairs in parentheses and use the multiply symbol * followed by the number of times the list is to be repeated. For example (5=1 5=0)*5, draws five copies of a 5ns strong high segment followed by a 5ns strong low segment.

To experiment with temporal equations:

Click the Add Signal button to add a signal, and change its name to bTIMEeqn using the Signal Properties dialog. (If the dialog is closed, double click on the signal name to open it.)
In the waveform equation edit box, (to the right of the Wfm Eqn button) enter the equation:

20ns=V (5ns=1 5ns=0)*4 (10ns=Z 10ns=X)*2 25ns=V
Click on the Wfm Eqn button to apply the equation.

The 20ns=V in the equation means that the signal will be initially valid for 20ns. Next the (5ns=1 5ns=0) will cause the signal to be a strong high for 5ns then a strong low for another 5ns. The *4 will cause the sequence inside the parentheses to be repeated 4 times. The rest of the equation is interpreted in the same way.

timeeqn

The text in the diagram above is made with a combination of text objects and setup parameters with custom labels. It is used to illustrate the different components of a temporal equation. This is just a quick demonstration of the documentation abilities of the program. For more information on documentation read Chapter 8: Formatting Timing Diagrams. You do not have to add the text for this tutorial.

Waveform equations are stored in the waveform equation drop down box, located next to the Wfm Eqn button. The equations can be used to create new signals or concatenated to the end of an existing signal.

Adding equations to existing signals:

In the Signal Properties dialog, click on the down arrow of the equation drop-down box to display the previous equations.
Select the default equation 8ns=Z (5=1 5=0)*5 9=H 9=L 5=V 5=X. You may have to scroll down to find it.
Click the Wfm Eqn button. Notice that the waveform was added to the end of the TIMEeqn signal.

Temporal Equations and a related feature called State Label Equations provide a quick method of generating and then labeling signals that represent Counter and Shifter circuits. The on-line help Chapter 11: Waveform Equation Generation has more information on these features.

2) Virtual, Group, and Simulated Buses

There are three kinds of buses supported by the timing diagram editor: group buses, virtual buses, and simulated buses.

2.1	Virtual buses are normal signals that use extended state information to represent bus values. Virtual buses are added using the Add Signal button. The state information is added using the HEX state button and the Virtual edit box. A virtual bus does not have member signals.
2.2	Group Buses are composite signals whose transitions and state values are determined by their member signals. Instead of individually editing related signals (like the address lines of a part), a group bus can compress all the signals’ data into one compact signal. The individual member signals can be uncoupled, or displayed along with the bus. Buses are added using the Add Bus button.
2.3	Simulated Buses are similar to group buses. The primary difference is that a simulated bus is purely simulated - the member signals cannot be edited manually. When any kind of simulation is performed, the simulated bus will be re-simulated and any changes will take place at that time.

2.1 Creating Virtual Buses:

Virtual Buses are the recommended way to display and work with bus information. Virtual Buses are also supported by the VHDL and Verilog stimulus and test bench generation features. If timing parameters are attached to a bus then virtual buses will increase computational performance for timing diagrams that use large buses (32 bits or more). To create a virtual bus:

Click the Add Signal button to add a new signal and name it VirtualBus.
Double click on the VAL state button so that the Valid state button stays active (state buttons will not toggle). The Valid button should be red and have a red T at the top of the button .
Draw four consecutive valid segments similar to the VirtualBus signal in the figure below.
Double click on the first segment in the signal to open the Edit Bus State dialog box.
Enter data into the Virtual field and use either the Next and Previous buttons or the key combinations Alt-N and Alt-P to move between the different segments. Any string of characters and numbers can be displayed in the bus. We used the following data: ABAB, E389, 34C8, valid data.
Click OK to close the Edit Bus State dialog when all the segments have been edited.
Click the ZOOM OUT button a couple of times to demonstrate how the extended state data automatically hides itself when its segment becomes too small to display the text.
Click the ZOOM IN button the same number of times to return the diagram to its original zoom level.

When exporting to VHDL or Verilog, the Virtual State information contained in a valid supersedes the graphical state of a segment. This allows you to export the state values of signals with types that have no graphical representation (integers for example).

2.2 Creating Group Buses:

Use group buses only when you need to get access to an individual bus signal at some point in your design or if you need to compress several signals that already exist. Group buses are useful for analysis of data that is imported from simulators or test equipment. Before a group bus can be created, its member signals must either be specified by selecting the signal names or new signals need to be created. We will use both methods in this tutorial.

To create a group bus and its member signals:

Make sure that no signal names are selected (clear selected signals by clicking in the Diagram window).
Click on the Add Bus button . This will open the Add Bus dialog box.
Type data into the Name box. The member signals will be named the same name as the bus, plus their signal number.
Enter 0 into the Start(LSB#): edit box. This is the least significant bit of the bus.
Enter 1 into the End(MSB#): edit box. This is the most significant bit of the bus.
Make sure the Group Bus radio button is selected. The radio buttons provide an easy method for creating group or virtual buses.
Verify that the Hide member signals check box is NOT checked. We want to be able to see the member signals in this demonstration.
Click the OK button to create the bus. There should be 3 signals generated: data (the bus), and data0 and data1 (the bus member signals). If the member signals are not shown, use the View > Show Hidden Signals to show them.
Next draw 5 high and low segments on data (the bus signal) and notice that the member signals are automatically drawn.
Double click on the first segment of data to open the Edit Bus State dialog.
Type the value 0 into the Hex edit box.
Use the Alt-N key combination to move to the next segment. Enter the values: 1,2,3,0 into the remaining four segments. Notice that the member signals have redrawn properly (except the red transition markers which we will fix later). The red transition markers preserve all the edge information of the member signals during a bus editing session. Click OK to close the dialog.
Select the Edit > Clear Red Events menu option to remove the edge place holders on the member signals.

Creating a group bus from existing signals

Select the signal names to be grouped, in order from LSB to MSB, then click the Add Bus button. In the next example we will create a second group bus whose member signals are reversed from the data bus.

Select signal data1 by clicking on the name. This will be the LSB of the new bus.
Select signal data0 by clicking on the name. This will be the MSB of the new bus.
Click on the Add Bus button to open the Choose Bus Typedialog. Notice that the New Bus dialog did not open up because this bus will be automatically created from the selected signals.
Choose the Group Bus radio button and click OK to close the dialog. Notice that Data2 was added and that it has a different MSB and LSB.

finalbus

Group buses have many features that are covered in Chapter 3: Group, Simulated, and Virtual Buses of the manual and the on-line help. Before you use group buses extensively, you should read this chapter and play with the align, bind, and expand features.

2.3 Creating Simulated Buses

Simulated Buses are similar to Group Buses. The primary difference is that the bus is generated using a Boolean Equation. A simulated bus can be referenced in another signal's Boolean equation, (group buses cannot). Also, TestBencher will generate a Boolean equation for the timing transaction so that the simulated bus can include input signals as member signals.

To add a Simulated Bus:

Click the Add Bus button to open the Add Bus dialog.
Select the Simulated Bus radio button.
Enter SimBus in the Name edit box.
Enter 0 into the Start(LSB#) edit box.
Enter 2 into the End(MSB#) edit box.
Click OK to close the dialog and add SimBus to the diagram.
Double click on the SimBus name to open the Signal Properties dialog. Notice that the Boolean equation is a concatenation of the member signal signals.

3) Summary

Congratulations! You have completed the Waveform Generation and Bus tutorial. In this tutorial we covered the generation of Waveforms from Temporal equations and adding to existing signals. We also covered virtual buses, group buses, and creating a group bus from existing signals. We examined the differences between Virtual, Group, and Simulated buses, and the recommended use for each. For more information, please refer to the manual or the on-line help.