SynaptiCAD VeriLogger Pro Press Release, February 2005

SynaptiCAD Design Tools Year Four Report - 2004

SynaptiCAD Educational Outreach Program
University of Washington
Department of Electrical Engineering
James K. Peckol, Ph.D.

Introduction and Overview

The Electrical Engineering Department at the University of Washington offers a rich set of courses for undergraduates and graduates in the field of digital systems and digital design. Such courses range from the study of LSI and VLSI design and digital signal processing to computer network telecommunications, embedded systems (including consumer electronics), and digital and computer systems design. In each area, we have a growing demand for more sophisticated and powerful modeling and simulation tools. During the last year, we have continued to make significant and increasing use of the SynaptiCAD design suite in most of our undergraduate digital classes. To that end, VeriLogger Pro has become the development environment of choice for most of the students. We have been using v9.0 of the sofware for approximately eighteen months now. Our comments will appear below.

The Application of the SynaptiCAD Tool Suite

During the last four years, the SynaptiCAD tool suite has been the Verilog modeling tool in EE 271 and EE 478. We have now moved it into EE 472 as well, but, on a smaller scale. A growing number of the EE 478 students have also made good use of the timing generation capability. All of the classes have access to a very good Unix based Verilog tool and design suite as well. Nonetheless, the SynaptiCAD tool suite has become the first choice for the students in several of the other digital oriented classes identified above.

In EE 271, EE 472, and EE 478, the SynaptiCAD tool suite supports the design, development and test of basic combinational and sequential digital circuits. In EE 271 and EE 478, the application problems are small to moderate and are relatively straightforward. Typically, the combinational problems have a gate complexity of several hundred gate equivalents and a sequential complexity of several dozen flip-flop equivalents. EE472 utilizes the tool suite for designing and implementing simple peripheral devices that can be controlled and operated from the embedded target processor.

As part of the full development process, the students must implement their designs using the GAL16V8 and GAL22V10 Programmable Logic Devices and a handful of TTL and CMOS glue logic chips. Such a requirement means that the students must first design and model their system using the SynaptiCAD tool suite then import the Verilog source into the Lattice ISPDesignExpert tool for synthesis into a JED file that is used to program the PLDs. In our courses, the designs are done at the structural level although some behavioural implementations are appearing in the more advanced courses.

The students' opinion of the tools continues to be very positive and enthusiastic. They were pleased with the modeling power of the tools as well as the suite's interface and the ease with which they could become productive. The inclusion of the project template in the main window when a new project is created is very helpful.

For, EE 476, and EE 477 (VLSI classes), the fact that the SynaptiCAD tools run on a PC rather than Unix has been important. They prefer the PC environment because it is more familiar and also because the user interface to the tools is easier to work with. For these classes, rather that using the complete Unix based development process as described earlier, they are initially designing then debugging their designs on the PC, moving to Unix for synthesis, then back to the PC for checking the synthesized results.

Computing Facilities

The Electrical Engineering department at the University of Washington has several hundred 2-3 GHz machines running Windows XP. Ideally, the SynaptiCAD tools would be served to all of the undergraduate and graduate students in the EE department. The total number of students using the tools would be approximately 400-500.


We have used the SynaptiCAD package of design tools for four years. The tools have been available to and used to varying degrees by students in EE 271, EE 471, EE 472, EE 476, EE 477, EE 478, and EE 498. All of the classes have access to a very good Unix based Verilog tool and design suite as well.

Their primary application has been to the design of small to modestly complex digital systems implemented using PLDs and to the design and development of moderately complex VLSI systems. In general, the students are comfortable with the tool. They find it easy to learn and to work with and in many cases prefer it to the Unix based alternative. Our experience working with and evaluating the SynaptiCAD 9.0 release has been positive.

About SynaptiCAD

SynaptiCAD develops design tools that help engineers think critically about their designs and offers a complete line of VHDL and Verilog model generation, simulation, and timing diagram visualization tools: TestBencher Pro -- test bench generation, VeriLogger Pro -- Verilog simulator, WaveFormer Pro -- waveform translator, Timing Diagrammer Pro -- timing diagram editor. SynaptiCAD is headquartered at 520 Prices Fork Rd #C4, Blacksburg, VA 24060. Telephone 540-953-3390. Internet:

University of Washington program coordinator is Dr. James K. Peckol, Email:[email protected]

SynaptiCAD contact is Donna Mitchell, (540)953-3390, or [email protected]

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