v2vh_voter.v

// Behavioral module for an 8bit voter (equality comparator)

module voter (z_out, a, b, en1, en2, dummy_in, dummy_out);
  output z_out, dummy_out;
  input [7:0] a, b;
  input en1, en2, dummy_in;

	reg z_out;
	wire [7:0] a, b;

	always @(a)
	  begin
		if (en1==1 | en2==1)
		  begin
			if (a==b) z_out = 1;
			else z_out=0;
	  	  end
		else z_out=1'bz;
	  end

	always @(b)
	  begin
		if (en1==1 | en2==1)
		  begin
			if (a==b) z_out = 1;
			else z_out=0;
	  	  end
		else z_out=1'bz;
	  end

endmodule

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